Title:Zero-Knowledge Proofs Beyond Circuits and Constraints — How to build a ZK CPU?
Speaker: Yibin Yang Georgia Institute of Technology
Time: 2023-12-26 10:00-2023-12-26 11:30
Venue:FIT 1-222


With recent advances in efficient Zero-Knowledge Proofs (ZKP) schemes, ZKP has become one of the most active areas in Cryptography that enables fruitful real-world applications. However, generic ZK schemes usually express the statements as a circuit or constraint system. The complicated front-end compiling problem brings efficiency overhead and a technical barrier for a broad deployment of ZKP.

In this talk, I will focus on our recent progress in building a generic ZKP scheme as a Central Processing Unit (CPU). The talk will be divided into two parts. In the first half of the talk, I will present our recent work (CCS ’23) on proving batched ZK disjunctive statements. Namely, the prover wishes to repeatedly prove to the verifier that she knows the inputs that can satisfy 1-out-of-B circuits. This models the execution of CPU steps. In the second half of the talk, I will present our other recent work (USENIX Security ’24) on enabling ACCESS gates in the circuit. Namely, the prover and the verifier want to access a large main read-write memory. This models the RAM machinery. Together, these two works enable an efficient full-fledged ZK CPU.

Short Bio:

Yibin Yang is a 5th year PhD student from Georgia Institute of Technology, advised by Professor Vladimir Kolesnikov. His research mainly focuses on ZK and MPC, both in practice and theory. Recently, he has been focusing on enabling generic ZK/MPC systems to support the RAM model of computation – namely, parties can perform ZKP/MPC directly using high-level programming languages such as C/C++/assembly. He also gets involved in the fair MPC and arithmetic garblings.